Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1995-06-05
1997-05-06
Tsai, H. Jey
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438666, 438586, 438396, H01L 2170, H01L 2700
Patent
active
056270933
ABSTRACT:
An electrode wiring layer of a semiconductor device according to this invention includes a first conductive portion formed of polycrystalline silicon or the like, and second conductive portions formed as refractory metal silicide layers on opposite lateral walls of the first conductive portion. Upper surfaces and lateral surfaces thereof are coated with insulating layers formed in separate processes. The insulating layers covering the lateral surfaces in particular are formed by a self-aligning technique requiring no mask process. Where conductive layers are formed over the wiring layer according to this invention, a film forming and patterning process for insulating the conductive portions of the wiring layer is omitted and insulation of the wiring layer is secured.
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Chen et al., "A New Device Interconnect Scheme for Sub-Micron VLSI," IEDM 1984, pp. 118-121.
Yang et al., "The Impact of Titanium Silicide on the Contact Resistance for Shallow Junction Formed by Out-Diffusion of Arsenic from Polysilicon," Ext. Abstracts of the 1992 Int. Conf. on Solid State Devices and Materials, Tsukuba, 1992, pp. 413-415.
Hachisuka Atsushi
Okumura Yoshinori
Mitsubishi Denki & Kabushiki Kaisha
Tsai H. Jey
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