Electrical computers and digital processing systems: memory – Address formation
Reexamination Certificate
2004-11-10
2009-06-02
Shah, Sanjiv (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
C711S166000, C711S170000, C711S104000, C711S106000, C711S218000, C708S300000, C365S222000, C710S010000
Reexamination Certificate
active
07543130
ABSTRACT:
A digital signal processor is adapted to a working RAM, which is capable of storing a plurality of data in a rewritable manner and whose storage area is divided into a plurality of sub-areas that are designated by addresses in read/write operations, wherein an operation circuit performs calculations on the data of the working RAM in accordance with a program, and wherein upon detection of a non-access event in which the program does not need to access the working RAM, a write circuit compulsorily writes ‘0’ into the working RAM with regard to each of the prescribed addresses of the prescribed sub-areas subjected to initialization, which are designated by address data. Thus, it is possible to actualize the selective initialization on the prescribed sub-areas within the working RAM without increasing the scale of the peripheral circuitry, without requiring complicated controls, and without increasing the overall processing time therefor.
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Ayash Marwan
Pillsbury Winthrop Shaw & Pittman LLP
Shah Sanjiv
Yamaha Corporation
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