Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
1998-12-30
2001-07-10
Ngo, Chuong Dinh (Department: 2121)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
06260052
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a digital communications signal processing apparatus applied to digital radar signal processing and a method therefor, and more particularly, to a digital signal processing apparatus in which windowing, Doppler filtering, and half phase filtering algorithms are successively performed, and a method therefor.
2. Related Art
The reason for using the windowing algorithm in digital signal processing and radar applications are to suppress Gibbs phenomenon generated due to discontinuity of signal data and to suppress generation of clutter signals.
One basic approach to designing a finite impulse response (FIR) digital filter is to first identify the infinite-duration impulse response by expanding the frequency response of an ideal filter in a Fourier series, and then to truncate and smooth this response using a window function. The most basic window is the rectangular window, where W
r
(n) can be shown as follows. W
r
(n)=1 when n>=−M and n<=m, and where W
r
(n)=0 otherwise. The use of the rectangular window corresponds to a direct truncation of the infinite-duration impulse response and leads to a solution exhibiting large ripples before and after the discontinuity of the ideal frequency response. This is the well-known Gibbs phenomenon.
The Gibbs phenomenon can be explained by the fact that H(&ohgr;) is related to the ideal response H
id
(&ohgr;)) and the frequency response of the window function
Ψ
(
ω
)
=
∑
n
=
-
M
M
w
[
n
]
ⅇ
-
j
n
ω
=
w
[
0
]
+
2
∑
n
=
1
M
w
[
n
]
cos
(
n
ω
)
(
A
)
through
H
(
ω
)
=
1
2
π
∫
-
π
π
H
id
(
θ
)
Ψ
(
ω
-
θ
)
ⅆ
θ
(
B
)
For the rectangular window,
Ψ
(
ω
)
=
∑
n
=
-
M
M
ⅇ
-
j
n
ω
=
sin
(
(
2
M
+
1
)
ω
2
)
sin
(
ω
2
)
(
C
)
I have found that a load applied for calculation can be severe. I have also found that real-time processing of windowing, Doppler filter, and half phase filter algorithms cannot be implemented.
SUMMARY OF THE INVENTION
To solve the above problems, objects of the present invention are to provide a digital signal processing apparatus for enabling real-time processing by reducing operating load of filtering processing to successively perform windowing, Doppler filtering, and half phase filtering algorithms, and a method therefor.
Accordingly, to achieve the above objects, there is provided a digital signal processing apparatus in which windowing, Doppler filtering, and half phase filtering algorithms are successively performed, which includes a storage portion for storing half phase filter coefficients, a first processor for processing windowing and half phase filtering according to a window weighting function using the coefficients stored in the storage portion, and a second processor for receiving an input signal and an output signal of the first processor and processing Doppler filtering.
Also, there is provided a digital signal processing method by which windowing, Doppler filtering and half phase filtering algorithms are successively performed, including the steps of (a) storing half phase filter coefficients, (b) processing windowing and half phase filtering according to a window weighting function using the stored coefficients, and (c) receiving an input signal and the processed output signal and processing Doppler filtering.
To achieve these and other objects in accordance with the principles of the present invention, as embodied and broadly described, the present invention provides a digital signal processing apparatus in which windowing, Doppler filtering, and halfphase filtering algorithms are successively performed, comprising: a storage portion storing a plurality of coefficients; a first processor performing a windowing operation and a half phase filtering operation according to a window weighting function using said plurality of coefficients stored in said storage portion, and then outputting a first signal resulting from said windowing and half phase filtering operations; and a second processor receiving said first signal and also receiving a second signal, and performing a Doppler filtering operation and then outputting a third signal.
To achieve these and other objects in accordance with the principles of the present invention, as embodied and broadly described, the present invention provides a digital signal processing method by which windowing, Doppler filtering, and half phase filtering algorithms are successively performed, comprising: storing a plurality of coefficients; performing a windowing operation and a half phase filtering operation according to a window weighting function using said plurality of coefficients, and outputting a first signal resulting from said performing of said windowing and half phase filtering operations; and receiving said first signal and a second signal and executing Doppler filtering.
To achieve these and other objects in accordance with the principles of the present invention, as embodied and broadly described, the present invention provides an apparatus, comprising: a first digital signal processor performing a windowing operation and a half phase filtering operation according to a window weighting function utilizing a predetermined plurality of coefficients, and then outputting a first signal resulting from said windowing and half phase filtering operations; and a second digital signal processor receiving said first signal output from said first processor and also receiving a second signal, and then performing a Doppler filtering operation and outputting a third signal resulting from said Doppler filtering operation.
The present invention is more specifically described in the following paragraphs by reference to the drawings attached only by way of example. Other advantages and features will become apparent from the following description and from the claims.
REFERENCES:
patent: 4914441 (1990-04-01), Brookner
patent: 4934373 (1990-06-01), Angelsen et al.
patent: 5519402 (1996-05-01), Kitayoshi
patent: 5647365 (1997-07-01), Abboud
patent: 6181755 (2001-01-01), Junell
“A Programmable Pulsed Doppler Radar Signal Processor Implementation with DSP for Adaptability and Multi-Function” by Y. K. Kwag et al., Oct. 1992, pp. 379-382.
Radar,92 (IEE Conference Publication No. 365) pp. 379 to 382: YK Kwag et al.
Bushnell , Esq. Robert E.
Ngo Chuong Dinh
Samsung Electronics Co,. Ltd.
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