Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2005-11-22
2005-11-22
Burd, Kevin (Department: 2631)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S294000, C327S156000
Reexamination Certificate
active
06968027
ABSTRACT:
A digital PLL device in accordance with the present invention comprises a selector for selecting one of a first synchronous timing signal and a second synchronous timing signal, and a comparator for outputting a phase correction value corresponding to phase difference between the synchronous timing signal selected by the selector and an internal synchronous timing signal. The digital PLL device stores the phase correction value from the comparator at a stable operation. The digital PLL device also performs a hold over operation accompanied by high accurate phase correction based on the phase correction value, since a fault occurs in the first synchronous timing signal until the timing signal is switched to the second synchronous timing signal.
REFERENCES:
patent: 5572167 (1996-11-01), Alder et al.
patent: 5673004 (1997-09-01), Park
patent: 5883533 (1999-03-01), Matsuda et al.
patent: 07-326963 (1995-12-01), None
Burd Kevin
McDermott Will & Emery LLP
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