Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1994-10-05
1995-12-26
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375375, 329307, 329360, 327244, 327236, H03D 324
Patent
active
054794587
ABSTRACT:
A digital phase shifter for phase-shifting a cyclic input signal includes first--third dividers 1, 4 and 8, first and second phase detectors 2 and 6, first and second voltage controlled oscillators (VCOs) 3 and 7, and a digital comparator 5. The input signal F(IN) and a clock signal F(VCO3) output from the first VCO3 are divided by N and M at the first and second dividers, respectively and phases of the divided signals are compared at the first phase detector 2, whereby the leading edges of the input and clock signals are synchronized. The second divider 4 also generates a count value (m) representing a cycle order number to the comparator, where it is compared with a preset value (.phi.) for determining the amount of phase shift, and an equate pulse EQ5 is generated when the compared values are the same. The second phase detector 6 compares phases of the equate pulse EQ5 and a divided signal obtained by dividing a second clock signal F(OUT) generated by the second VCO7 by N, whereby the second clock signal F(VCO7) becomes a phase-shifted signal of the input signal.
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Chin Stephen
Luther William
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