Digital phase-locked loop circuit and a method thereof

Details Digital phase-locked loop circuit and a method thereof Digital phase-locked loop circuit and a method thereof

2005-07-12

2009-12-15

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S354000

Reexamination Certificate

active

07634037

ABSTRACT:
A method and a circuit for resolving the out-of-phase problem between a color burst signal and a sub-carrier signal of a television system. A delay means is used which leads to the synchronization of the color burst signal and the sub-carrier signal such that a subsequent color demodulator can demodulate correct color signals. Therefore, the locking of the two signals will be fastened without any excessively large circuit hardware.

REFERENCES:
patent: 5896428 (1999-04-01), Yanagiuchi
patent: 6034735 (2000-03-01), Senbongi et al.
patent: 6043694 (2000-03-01), Dortu
patent: 6310653 (2001-10-01), Malcolm, Jr. et al.
patent: 6538702 (2003-03-01), Taketani et al.
patent: 6741289 (2004-05-01), Bicacki
patent: 2003/0053564 (2003-03-01), Kim et al.
patent: 2005/0226429 (2005-10-01), Hollowbush et al.
patent: 373389 (1998-08-01), None

Affiliated with

Also associated with

Rating

Digital phase-locked loop circuit and a method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital phase-locked loop circuit and a method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital phase-locked loop circuit and a method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4096912