Digital phase locked loop assembly

Details Digital phase locked loop assembly Digital phase locked loop assembly

1996-12-09

1998-09-29

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375327, 375294, 375215, 375373, 329294, 329308, H03D 324

Patent

active

058155414

ABSTRACT:
A digital PLL apparatus includes a synchronization integrating circuit, an angle calculating circuit, and a digital PLL circuit. The synchronization integrating circuit determines a symbol timing by obtaining the maximum amplitude point of a correlation level during reception of a preamble. The angle calculating circuit outputs a phase .theta.c by performing an angle calculation every symbol timing determined by the synchronization integrating circuit. The digital PLL circuit receives the phase .theta.c from the angle calculating circuit and operates a phase locked loop, thereby obtaining an output phase.

REFERENCES:
patent: 5157694 (1992-10-01), Iwasaki
patent: 5179573 (1993-01-01), Paradise
patent: 5440267 (1995-08-01), Tsuda et al.
patent: 5504787 (1996-04-01), Zscheile, Jr. et al.

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