Digital phase locked loop assembly

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

375327, 375294, 375215, 375373, 329294, 329308, H03D 324

Patent

active

058155414

ABSTRACT:
A digital PLL apparatus includes a synchronization integrating circuit, an angle calculating circuit, and a digital PLL circuit. The synchronization integrating circuit determines a symbol timing by obtaining the maximum amplitude point of a correlation level during reception of a preamble. The angle calculating circuit outputs a phase .theta.c by performing an angle calculation every symbol timing determined by the synchronization integrating circuit. The digital PLL circuit receives the phase .theta.c from the angle calculating circuit and operates a phase locked loop, thereby obtaining an output phase.

REFERENCES:
patent: 5157694 (1992-10-01), Iwasaki
patent: 5179573 (1993-01-01), Paradise
patent: 5440267 (1995-08-01), Tsuda et al.
patent: 5504787 (1996-04-01), Zscheile, Jr. et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Digital phase locked loop assembly does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital phase locked loop assembly, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital phase locked loop assembly will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-693588

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.