Digital phase-locked loop

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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375373, H03D 324

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active

054597668

ABSTRACT:
An integrated circuit comprises a time-discrete oscillator which generates numerical and time-discrete phase values of an oscillator signal. The circuit also comprises a time-continuous oscillator which generates a time-continuous oscillation signal. The circuit comprises a phasemeter which is coupled to the time-continuous oscillator in order to sample phase values of the time-continuous signal. The difference between the generated phase values and the sampled phase values is measured in a comparator circuit. This difference is utilized in a phase-locked loop in order to readjust the frequency of the time-continuous oscillator, so that the time-continuous oscillation is latched to the time-discrete oscillation. The phase comparison can thus be executed in a substantially time-discrete manner. As a result, the operational reproducibility of the circuit is very high. Because phase comparison is not restricted to a single, fixed phase point during the oscillation period, the phase locking exhibits hardly any jitter.

REFERENCES:
patent: 4802009 (1989-01-01), Hartmeier
patent: 5337335 (1994-08-01), Cloetens et al.
"Line-locked Digital Colour Decoding", by T. Nillesen, ACTA Electronica 27, 1-2, 1985, pp. 101-107.

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