Digital phase-locked data recovery circuit

Details Digital phase-locked data recovery circuit Digital phase-locked data recovery circuit

1994-11-14

1996-02-13

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375371, H03D 324

Patent

active

054917298

ABSTRACT:
A digital phase-locked data recovery circuit having improved noise immunity. The data recovery circuit includes a multi-phase clock for supplying clock signals having a predetermined relative phase relationship. A snap shot sampling network takes samples of an input data signal in response to the multi-phase clock signals. The samples are preferably collected during the duration of boundary sampling windows encompassing transitions in the input data signal. The present invention further includes a network for comparing the received data samples with a sample pattern. A phase encoder then generates error signals in response to the phase comparisons. A phase decoder adjusts the phase of the boundary window in response to the error signal.

REFERENCES:
patent: 4584695 (1986-04-01), Wong et al.
patent: 4821296 (1989-04-01), Cordell
patent: 4821297 (1989-04-01), Bergmann et al.
patent: 4965884 (1990-10-01), Okura et al.
patent: 5073905 (1991-12-01), Dapper et al.

Affiliated with

Also associated with

Rating

Digital phase-locked data recovery circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital phase-locked data recovery circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital phase-locked data recovery circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-245359