Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1995-07-10
1996-09-24
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375327, 375376, 331 1R, 331 25, 327149, 327158, H03D 324
Patent
active
055598412
ABSTRACT:
An improved digital phase detector is used in a digital phase lock loop having a digitally controlled oscillator which includes a state controller and a counter. One embodiment of the phase detector includes a digital integrator; a first register and a first absolute value function; a second register and a second absolute value function; and a subtractor. In another embodiment the integrator includes a tapped delay line and a parallel summing network. The summing network includes a flow counter. The invention to provide a mechanism for ensuring the symmetry of the integration intervals of an early/late gate phase detector in the presence of phase error and to achieve relaxed timing for the phase error calculation without shortening the integration intervals to less than half a bit time while providing a valid phase error output once for each bit period.
REFERENCES:
patent: 3746800 (1973-07-01), Stuart
patent: 3778550 (1973-12-01), David et al.
patent: 3840821 (1974-10-01), Conway
patent: 4535459 (1985-08-01), Hogge, Jr.
patent: 4933890 (1990-07-01), Nuytkens et al.
patent: 5222144 (1993-06-01), Whikehart
Chin Stephen
King Patrick T.
VLSI Technology Inc.
Vo Don
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