Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2006-01-03
2006-01-03
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S026000, C326S027000, C326S083000
Reexamination Certificate
active
06982572
ABSTRACT:
The invention includes digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges. Embodiments of skewed logic devices in accordance with the present invention include inverters, buffers, NOR gates and NAND gates for rapidly propagating a selected “fast” edge of an input signal. Additional embodiments include pulse stretchers, memory devices, substrates, computer systems and methods incorporating the skewed logic devices of the present invention. Each embodiment of a skewed logic device of the present invention is configured to propagate either a fast rising edge or fast falling edge of an output signal, i.e., the “fast” edge, at rates comparable to those of domino logic. An advantage of the skewed logic devices of the present invention over conventional CMOS logic devices is rapid edge propagation. Additionally, virtually all of the input gate loading is devoted to the fast edge being propagated. Additionally, the reset networks, as disclosed herein, are buffered by at least two gates, thus reducing loading seen by the input or the output of the skewed logic device.
REFERENCES:
patent: 4948990 (1990-08-01), Shin et al.
patent: 5163168 (1992-11-01), Hirano et al.
patent: 5343090 (1994-08-01), Proebsting
patent: 5396110 (1995-03-01), Houston
patent: 5410189 (1995-04-01), Nguyen
patent: 5467037 (1995-11-01), Kumar et al.
patent: 5519344 (1996-05-01), Proebsting
patent: 5541536 (1996-07-01), Rajivan
patent: 5612638 (1997-03-01), Lev
patent: 5864251 (1999-01-01), Bloker et al.
patent: 5901079 (1999-05-01), Chiu et al.
patent: 5914624 (1999-06-01), Son
patent: 5933830 (1999-08-01), Williams
patent: 5942917 (1999-08-01), Chappell et al.
patent: 5982198 (1999-11-01), Fulkerson
patent: 6011410 (2000-01-01), Kim et al.
patent: 6040713 (2000-03-01), Porter et al.
patent: 6118303 (2000-09-01), Schmitt et al.
patent: 6239618 (2001-05-01), Porter et al.
patent: 6292027 (2001-09-01), Dhong et al.
patent: 6307409 (2001-10-01), Wrathall
patent: 6323698 (2001-11-01), Fletcher
patent: 6339344 (2002-01-01), Sakata et al.
patent: 6448881 (2002-09-01), Taylor
patent: 6459307 (2002-10-01), Kim
patent: 6462580 (2002-10-01), Nishio et al.
patent: 6462584 (2002-10-01), Proebsting
patent: 6462998 (2002-10-01), Proebsting
patent: 6476640 (2002-11-01), Porter et al.
patent: 6483349 (2002-11-01), Sakata et al.
patent: 6492836 (2002-12-01), Kiehl
patent: 6577153 (2003-06-01), Kodama
patent: 6628139 (2003-09-01), Porter et al.
patent: 6639476 (2003-10-01), Sullivan
patent: 6657459 (2003-12-01), Nishio et al.
patent: 6720794 (2004-04-01), Seike
patent: 6724218 (2004-04-01), Porter et al.
patent: 6734700 (2004-05-01), Chiu et al.
patent: 6734701 (2004-05-01), Bedarida et al.
Braceras, G., et al., “A 350 MHz 3.3V 4Mb SRAM Fabricated in a 0.3μm CMOS Process,” ISSCC97/Session 24/Non-Volatile Memory and SRAM/Paper SP 24.5, IEEE Internat'l. Solid-State Circuits Conf., Digest of Technical Papers, Feb. 1997, pp. 404-405.
Amrutur, B., et al., “A Replica Technique for Wordline and Sense Control in Low-Power SRAM's,” IEEE Journal of Solid-State Circuits, vol. 33, No. 8, Aug. 1998, pp. 1208-1219.
Gans Dean D.
Porter John D.
Weber Larren G.
Mai Lam T.
Micro)n Technology, Inc.
Tokar Michael
TraskBritt
LandOfFree
Digital logic devices with extremely skewed trip points and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Digital logic devices with extremely skewed trip points and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital logic devices with extremely skewed trip points and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3535316