Digital interface with low power consumption

Details Digital interface with low power consumption Digital interface with low power consumption

2001-07-17

2003-03-25

Chang, Daniel (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S027000, C326S062000

Reexamination Certificate

active

06538474

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a digital input/output interface, and a telecommunication device using such an interface.
The invention is advantageously used for digital data transfers. For example, it may be used in digital mobile communication devices to transfer digital data from a baseband processor to an analogue radio transceiver.
Such a digital input/output interface is known from U.S. Pat. No. 5,811,984. The digital input/output interface described in this document comprises a current driver and a current receiver connected by a transmission line. The current driver is configured to pull a current from the current receiver when a digital signal is applied to the current driver. The current receiver includes a current conversion element connected to the transmission line at an input node through an input impedance Z
in
, and an active termination element configured to adjust this input impedance Z
in
to match the characteristic impedance of the transmission line.
The drawback of this digital interface is that it is power consuming. Therefore, it would generate high interference noise in the sensitive band of radio frequency chips. This would make it impossible to transfer digital data to such chips while they are operating.
SUMMARY OF THE INVENTION
It is an object of the present invention to propose a digital input/output interface having a very low power consumption and hence generating low interfering noise in the sensitive band of radio frequency chips.
Another object of the invention is to propose an efficient input/output interface for use in digital mobile communication devices.
This is achieved with the input/output interface as claimed in claim
1
. According to the invention, the voltage at the input node of the current receiver is small and remains approximately constant. As a consequence, if the interface is operated with low currents, the power consumption is very low. In the interface of the invention, the impedance of the line is not compensated anymore. But this is not critical at the data rates used in the contemplated applications under consideration (a few Mega-samples per second).
In an advantageous embodiment the proposed interface has a differential structure. In such a differential structure the same current is generated in one of the two branches depending on the data to be transferred. This leads to lower interference noise.
In another advantageous embodiment, the current receiver comprises a current source and a current adding element arranged to bias said current mirror circuit. This allows to increase the speed of the interface. This is especially useful when the interface has a differential structure, because in that case the branch of the current receiver that is switched off loses its bias.


REFERENCES:
patent: 5111080 (1992-05-01), Mizukami et al.
patent: 5519728 (1996-05-01), Kuo
patent: 5811984 (1998-09-01), Long et al.
patent: 0963083 (1999-08-01), None

Affiliated with

Also associated with

Rating

Digital interface with low power consumption does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital interface with low power consumption, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital interface with low power consumption will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3046029