Digital integrator for pulse-density modulation using an adder c

Pulse or digital communications – Pulse number modulation

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341144, 708706, H03D 318, H03M 166, G06F 750

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active

059955465

ABSTRACT:
A pulse-density modulator (10) for producing a pulse density output signal on an output line (36) representing successive parallel digital input words on input terminals (12) has a plurality of full adders (14, 16, 18), each having a carry output (C), and an input (A) for receiving a respective bit of a concurrently applied bit of the parallel input digital words. The overflow output (C) of each of the adders (14, 16, 18) is added as an input (B) of an adder of a next successively higher bit order. A latch (30) receives the carry output (C) of one of the adders (14) in a most significant bit position, with an output of the latch provides a pulse density modulated signal on an output line (36) representing the input digital words. A clock (35) applies clock pulses to the latches (20, 22, 24, 30) at a frequency at least as high as the frequency at which the successive parallel digital input words are applied to the inputs (12) of the adders (14, 16, 18).

REFERENCES:
patent: 4819252 (1989-04-01), Christopher
patent: 5012437 (1991-04-01), Recker et al.
patent: 5031131 (1991-07-01), Mikos
patent: 5059979 (1991-10-01), Micic et al.
patent: 5065353 (1991-11-01), Nojiri et al.

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