Digital electronic system

Details Digital electronic system Digital electronic system

1988-12-01

1990-09-11

Olms, Douglas W.

Pulse or digital communications

Repeaters

Testing

178 71R, H04L 2520, H04L 2552

Patent

active

049568507

ABSTRACT:
A bus interconnecting a plurality of digital modules is divided into sections interconnected by buffers so that the loading on the drive circuits of the modules is reduced. Unidirectional buffers can be used where a bus section is connected only to modules driving the bus section or only to modules receiving signals from the bus section. A bidirectional buffer is clocked so that it is only capable of signal transmission in either direction during a clock pluse, thereby eliminating the regenerative feedback which would cause the buffer to hold a signal value. The logical sense of signals used by the bus sections may all be the same or some sections may use signals of the opposite logical sense; inverting and non-inverting buffers are used as required. A gated buffer may be provided enabling signal transmission from one bus section to another to be blocked. The modules, bus and buffers may be formed as an integrated circuit.

REFERENCES:
patent: 3832489 (1974-08-01), Krishna
patent: 4099024 (1978-07-01), Boggs et al.
patent: 4154978 (1979-05-01), Tu
patent: 4577327 (1986-03-01), Nambu
patent: 4598410 (1986-07-01), Smith et al.
patent: 4700342 (1987-10-01), Egami
patent: 4726034 (1988-02-01), Schillhof et al.
patent: 4811195 (1989-03-01), Evans

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