Digital demodulating apparatus, controlling method of the...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Details

C348S723000, C348S726000, C375S240000, C375S341000

Reexamination Certificate

active

07861133

ABSTRACT:
A digital demodulating apparatus comprises circuit elements constituting a tuner that performs channel select processing to an interleaved received signal, and a demodulator that demodulates the received signal; a deinterleaving section that deinterleaves the interleaved received signal; an error correcting section that corrects errors in the received signal deinterleaved by the deinterleaving section; and a circuit element controlling section that controls an operation of at least one of the circuit elements. The circuit element controlling section estimates the quantity of hypothetical errors in the received signal caused by a control of a circuit element. The circuit element controlling section judges from the estimated quantity of hypothetical errors whether the error correcting section can correct errors in the received signal caused by the control of the circuit element. The circuit element controlling section controls the circuit element so as to decrease the quantity of errors in the received signal caused by the control of the circuit element, when the circuit element controlling section decided that the error correcting section can not correct the errors in the received signal.

REFERENCES:
patent: 6675000 (2004-01-01), Ichikawa
patent: 6707806 (2004-03-01), Kato
patent: 7693224 (2010-04-01), Rhodes
patent: 2003/0142764 (2003-07-01), Keevill et al.
patent: 2004/0015765 (2004-01-01), Cooper et al.
patent: 2006/0215590 (2006-09-01), Sharma et al.
patent: 2001-251275 (2001-09-01), None

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