Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2001-11-15
2003-07-15
Nguyen, Hiep T. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S156000
Reexamination Certificate
active
06594726
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to the field of digital computer systems and more particularly to a digital data storage subsystem including a directory for efficiently controlling a “fast write” storage operation.
BACKGROUND OF THE INVENTION
In modern “enterprise” computing environments, that is, computer systems for use in an office environment in a company, a number of personal computers, workstations, mini-computers and mainframe computers, along with other devices such as large mass storage subsystems, network printers and interfaces to the public telephony system, may be interconnected to provide an integrated environment in which information may be shared among users in the company. Typically, users may be performing a variety of operations, including order receipt, manufacturing, shipping, billing, inventory control, and other operations, in which sharing of data on a real-time basis may provide a significant advantage over, for example, maintaining separate records and attempting to later reconcile them. The users may operate on their own data, which they may maintain on the computers they are using, or alternatively they may share data through the large mass storage subsystems.
One such large mass storage subsystem is described in, for example, U.S. Pat. No. 5,206,939, entitled System And Method For Disk Mapping And Data Retrieval, issued Apr. 27, 1993, to Moshe Yanai, et al (hereinafter, “the '939 patent”), and U.S. Pat. No. 5,381,539, entitled “System And Method For Dynamically Controlling Cache Management,” issued Jan. 10, 1995, to Moshe Yanai, et al., both of which are assigned to the assignee of the present invention and incorporated herein by reference. That patent and those applications generally describe an arrangement which allows data, as used by computers, organized in records, with each record being in well-known “CKD” (“count-key-data”) format, to be stored in storage devices which provide a “fixed block” storage architecture. In this arrangement, a large cache is used to buffer data that is transferred from the storage devices for use by the respective computers, and, if the data has been modified, transferred back to the storage devices for storage.
In a number of types of programs, information contained in a particular record may need to be updated a number of times in a relatively short time interval. To reduce the number of times the record is stored on the storage device, some computer systems provide a type of storage operation that is referred to as a “fast write” storage operation. Typically, during a conventional “write” storage operation, updated information will be transferred to the respective storage device for storage. This can result in an increase in the amount of information that is transferred to the particular storage device on which a record is stored if the record is to be updated a number of times in a relatively short time interval. In a “fast write” storage operation, however, the information updates are buffered until a “commit” command is issued, at which point the consolidated updates can be transferred to the storage device for storage. As an alternative, the program may determine that the updates are to be discarded, in that case a “discard” command may be issued, and the updates will not be transferred to the storage device for storage. A problem can arise, however, in managing the “fast write” storage operation, to facilitate distinguishing between the “fast write” storage operation and the “normal write” storage operation while a “fast write” storage operation is in process.
SUMMARY OF THE INVENTION
The invention provides a new and improved digital data storage subsystem including an arrangement for efficiently controlling a fast write operation
In brief summary, the invention provides a digital data storage system comprising at least one storage device, a descriptor memory and a channel adapter. The at least one storage device is configured to store a series of records, the records being organized in a plurality of tracks, each track being associated with one of a plurality of cylinders. The descriptor memory configured to store at least one descriptor associated with said at least one storage device, said at least one descriptor containing selected information relating to the operational status at least one storage device, the selected information including, for each track, a write pending flag and a fast write pending flag. The channel adapter is configured to receive requests from a host, one type of request including a fast write request to initiate a fast write operation in connection with one of said tracks and another type of request including a commit request to terminate the fast write operation. The channel adapter, after receiving a request of the fast write type for one of said tracks, sets the fast write pending flag associated with the one of said tracks, and, after receiving a request of the commit type for said one of said tracks, copies the fast write pending flag associated with the one of said tracks to the write pending flag associated with the one of said tracks, and clears the fast write pending flag associated with the one of said tracks.
The digital data storage system further includes a memory configured to store a data structure, the data structure comprising a plurality of levels, including a lowest level and a highest level. The lowest level comprises a plurality of flags each associated with one of said tracks, and each successively higher level being associated with a selected series of flags in the next lower level. The channel adapter is further configured to, after receiving a request of the commit type for said one of said tracks, also copy the fast write pending flag to the flag associated with the track in the lowest level, and ensure that the flags in the higher levels associated with that flag in the lowest level are also set.
The digital data storage system further includes a storage controller that is configured to use the data structure in connection with transfers of data to the storage device for storage. In that connection, the storage controller is configured to determine from the flags comprising the highest level of the data structure whether any of the flags in the lowest level of the data structure are set, and, if so, proceed through successive levels down the data structure to identify the tracks for which the flags in the lowest level of the data structure are set, and control transfer of data for the identified tracks.
REFERENCES:
patent: 5206939 (1993-04-01), Yanai et al.
patent: 5381539 (1995-01-01), Yanai et al.
patent: 5787473 (1998-07-01), Vishlitzky et al.
patent: 5900009 (1999-05-01), Vishlitzky et al.
patent: 6052797 (2000-04-01), Ofek et al.
patent: 6101588 (2000-08-01), Farley
patent: 6275897 (2001-08-01), Bachmat
patent: 6298386 (2001-10-01), Vahalia et al.
patent: 6484234 (2002-11-01), Kedem
patent: 6513102 (2003-01-01), Garrett et al.
Kopylovitz Haim
Vishlitzky Natan
EMC Corporation
Gunther John M.
Jordan Richard A.
Nguyen Hiep T.
Wilson Penelope S.
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