Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1998-11-10
2002-05-28
Chung, Phung M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S752000
Reexamination Certificate
active
06397364
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to storage and transmission of digital data by analog media, discrete and continuous, and more particularly to digital data representation for multi-bit data storage and transmission.
One common practice for transmission of binary data is by means of bit representation as sequences of binary streams. See, for example, Spread Spectrum Systems, 2nd edition, 1984 by Robert C. Dixon.
The coding technique described in that reference is used by various transmission systems to overcome issues of interference, such as inter-symbol, channel jamming and other. One typical advantage to the use of PRN (Pseudo Random Noise) sequences is the ability of several users sharing the same frequency in the same time.
This coding technique is not used with multi-bit signals, where a sequence represents several bits (a word). Many applications may benefit from the representation of multi-bit (word) with a sequence and the use of multiple sequences in the same media, transmission channel or storage cells, to represent a block of data.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide for storage and transmission of digital data by analog media, discrete and continuous, and more particularly to digital data representation for multi-bit data storage and transmission. A storage memory according to the present invention for storing digital data includes digital signal processing (DSP) means for transforming a digital data bit stream having a stored data component so as to provide improved storage capacity; means for converting the transformed digital data to form analog data; and discrete analog memory means for storing the analog data.
The drive for the present invention is the development of means to trade Ns (media noise) with Np (process contributed noise), thus allowing for storage of more bits per memory cell or increase capacity of transmission channel when compared to the amounts attainable by common practice. The storage media may be of any analog type, such as FLASH, RAM (D or S), EPROMS of various types and even used with continuous analog data storage or transmission. Analog storage or transmission is referred here as the general case that embodies the multi bit case.
The present invention takes advantage of coding the data for storage by means of “orthogonal” vectors (see Dictionary of Science & Technology, by Wordsworth Editions Ltd, 1995, ISBN 1-85326-351-6, page 634), similar to the use of such means in communications. Actually, every implementation used in communications system to improve Signal-to-Noise-Ratio of discrete data sequences, might be applicable for discrete analog storage.
By transforming or coding the digital data prior to storage and store the transformed data as analog data, results an improvement in total S/N (Signal to Noise ratio), allowing for better utilization of the analog media (storage or transmission) when compared with the implementation of conventional approaches. In the case of discrete analog memory, the better utilization is measured by the average amount of bits of data stored in each memory cell.
The present invention may be implemented by using various means of data transformation. It is important to distinguish between this step and ECC (Error Control Coding) means which are allowing for the recovery of signals/data in noise, without the improvement of S/N. Means of ECC are applicable here as complementary means to cope with errors in the digital data after the inverse transformation or decoding.
The process has two main steps:
1. Error Control Coding.
2. Coding/Decoding of the resulting bit/word stream.
The ECC (Error Control Coding) needs to be properly implemented with the new processing. The application of this means may be carried out by conventional means, but new techniques will take advantage of the a priori known decoded data.
After applying ECC and adding the required bits/data, the resulting bit/data streams are organized in blocks of n words each, with m bits in each word. Contrary to conventional implementation that stores these words to n discrete analog cells, the present invention provides that these n data values will be coded to form a new block of n′ words with m′ bits each. The resulting block of data is stored in n′ discrete analog memory cells. The selection of the coding, n, m, n′ and m′ is made in such way to improve S/Ns (Signal to Storage Noise ratio) while maintaining low processing noise (Np), where Ns is the noise generated by the storage media and is added (or multiplied) to the analog values during the read process. Ns is a function of various arguments such as: process, technology, temperature, time, radiation—usually given as probability distribution function.
The coding techniques may vary in many ways and may use known sequences. The selection of the Coding (and n, m, n′ and m′) is done to allow the addition of processing noise (Np) to storage noise (Ns), in controlled manner, thus the total noise levels after the processing will be below the storage noise (Ns). Other considerations are issues related to the required BER (Bit Error Rate) and ECC.
Since the exact contribution of the processing noise may be computed before the actual storage of the data, by means of decoding prior to the actual storage, further improvement may be gained by optimizing the ECC (Error Control Coding) means, and minimize the overhead contributed by the ECC to achieve a certain BER (Bit Error Rate).
Other objects, features and advantages of the present invention will become apparent from the following detailed description when taken in conjunction with the accompanying drawings.
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Amanze Emeka J.
Chung Phung M.
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