Digital circuit using memory for monitoring signals for occurren

Details Digital circuit using memory for monitoring signals for occurren Digital circuit using memory for monitoring signals for occurren

1997-06-10

1999-08-03

Palys, Joseph E.

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

714 35, G06F 1122

Patent

active

059319569

ABSTRACT:
A breakpoint unit contains a memory circuit which monitors digital signals for the occurrence of any of a plurality of predetermined conditions. The memory circuit includes an array of memory cells (each cell storing data determining a value of a breakpoint condition of interest), and selected ones of the cells can be read in response to various combinations of the signal bits. In some embodiments, the array includes 2.sup.N cells and data stored in each cell is readable in response to N binary signal bits which are treated as an N-bit address signal. The memory circuit outputs the accessed data value from one memory cell, which would be used as a breakpoint signal that halts or initiates operation of the circuit originating the signals being monitored.

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patent: 4675646 (1987-06-01), Lauer
patent: 5249278 (1993-09-01), Krauskopf
patent: 5371894 (1994-12-01), DiBrino
patent: 5440700 (1995-08-01), Kaneko
patent: 5704034 (1997-12-01), Circello
patent: 5717851 (1998-02-01), Yishay et al.
patent: 5841670 (1998-11-01), Swoboda

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