Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1995-07-19
1998-02-17
Tse, Young T.
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375375, 331 25, 327 12, 327163, H03D 324
Patent
active
057199086
ABSTRACT:
A high speed bit synchronizer is provided with a digital phase detector and a digital offset eliminating circuit. The output of the digital offset eliminating circuit is summed together with the output of the digital phase detector to compensate for the DC offset voltage generated by unsymmetrical digital data received at the input of the phase detector. Further, the phase error offset voltage produced at the output of the digital phase detector is linearized so that the lock point of the phase S-curve located on a linearized portion of a phase offset S-curve, thus, substantially eliminating all seeking and jitter that normally occurs at the lock point.
REFERENCES:
patent: 4546486 (1985-10-01), Evans
patent: 5063577 (1991-11-01), Arbannas et al.
patent: 5148123 (1992-09-01), Ries
patent: 5477177 (1995-12-01), Wong et al.
patent: 5485484 (1996-01-01), Williams et al.
patent: 5570395 (1996-10-01), Myers
patent: 5592125 (1997-01-01), Williams
patent: 5608731 (1997-03-01), Upp et al.
Arbanas Glenn Arthur
Greeff Roy Edgar
Williams Bruce Howard
O'Rourke John F.
Sowell John B.
Starr Mark T.
Tse Young T.
Unisys Corporation
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