Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2005-01-04
2005-01-04
Thomas, Tom (Department: 2815)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S179000, C257S355000, C257S358000, C257S363000
Reexamination Certificate
active
06838323
ABSTRACT:
A structure and process for making a non-aligned MOSFET structure for ESD protection using resistor wells as the diffusions and adjustable capacitors. The present invention compensates the shallow extension region without the need for additional masks. The source/drain doping is less than that of a normal MOSFET but extends deeper into the silicon since the present invention uses a resistor well as the source/drain. The deeper emitter/collector increases the second trigger current of the NFET when used as an ESD protection device.
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Gauthier Robert J.
Nowak Edward J.
Tian Xiaowei
Tong Minh H.
Voldman Steven H.
DeLio & Peterson LLC
Diaz José R.
International Business Machines - Corporation
Reynolds Kelly M.
Thomas Tom
LandOfFree
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