Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate
2009-01-26
2011-11-08
Richards, N Drew (Department: 2895)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
C257S643000, C257S751000, C257S758000, C257S759000, C438S618000, C438S619000
Reexamination Certificate
active
08053861
ABSTRACT:
Provided are methods and apparatuses for depositing barrier layers for blocking diffusion of conductive materials from conductive lines into dielectric materials in integrated circuits. The barrier layer may contain copper. In some embodiments, the layers have conductivity sufficient for direct electroplating of conductive materials without needing intermediate seed layers. Such barrier layers may be used with circuits lines that are less than 65 nm wide and, in certain embodiments, less than 40 nm wide. The barrier layer may be passivated to form easily removable layers including sulfides, selenides, and/or tellurides of the materials in the layer.
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WO patent application No. PCT/US2010/021857, International Search Report and Written Opinion mailed Aug. 20, 2010.
Mayer Steven T.
Mountsier Thomas W.
Powell Ronald A.
Shaviv Roey
Novellus Systems Inc.
Richards N Drew
Singal Ankush
Weaver Austin Villeneuve & Sampson LLP
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