Diffusion barrier for electrical interconnects in an integrated

Details Diffusion barrier for electrical interconnects in an integrated Diffusion barrier for electrical interconnects in an integrated

1995-11-08

1998-02-03

Niebling, John

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438628, 438629, 438687, 438688, H01L 21441

Patent

active

057144184

ABSTRACT:
An electrical interconnect structure comprising a diffusion barrier and a method of forming the structure over a semiconductor substrate. A bi-layer diffusion barrier is formed over the substrate. The barrier comprises a capturing layer beneath a blocking layer. The blocking layer is both thicker than the capturing layer and is unreactive with the capturing layer. A conductive layer, thicker than the blocking layer, is then formed over the barrier. While the conductive layer is unreactive with the blocking layer of the barrier, the conductive layer is reactive with the capturing layer of the barrier.

REFERENCES:
patent: 5312774 (1994-05-01), Nakamura et al.
patent: 5354712 (1994-10-01), Ho et al.
patent: 5380678 (1995-01-01), Yu et al.
patent: 5391517 (1995-02-01), Gelatos et al.
patent: 5527739 (1996-06-01), Parillo et al.

Affiliated with

Also associated with

Rating

Diffusion barrier for electrical interconnects in an integrated does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Diffusion barrier for electrical interconnects in an integrated , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Diffusion barrier for electrical interconnects in an integrated will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-662061