Differential-type data transmitter

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Bipolar transistor

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326 22, 326 31, 327 52, 327563, 330 2, 330258, H03K 19086, H03F 345

Patent

active

059107367

ABSTRACT:
A differential-type data transmitter includes a differential amplifier pair (T1, T2, T4, T6, T8) having a plurality of transistors and receiving a pair of a first input signal and a second input signal. A load (T3, T5, T7) is connected to the differential amplifier pair. A detection circuit (T9, T10, I4, I5, I6, I7) connected to a junction between the differential amplifier pair and the load is operative for detecting whether or not the first and second input signals are outside a common-mode input voltage range with respect to the differential amplifier pair. A first output circuit (T12) connected to the detection circuit is operative for outputting a signal depending on an output signal from the differential amplifier pair. The signal outputted from the first output circuit is set to a given level when the detection circuit detects that the first and second input signals are outside the conmmon-mode input voltage range. A second output circuit (T11) connected to the detection circuit is operative for outputting a detection signal representing whether or not the detection circuit detects that the first and second input signals are outside the common-mode input voltage range.

REFERENCES:
patent: 3582802 (1971-06-01), Weekes et al.
patent: 5294893 (1994-03-01), Ryat
patent: 5298809 (1994-03-01), Yamaguchi
patent: 5420550 (1995-05-01), May

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