Differential transistor pair

Details Differential transistor pair Differential transistor pair

2006-04-04

2006-04-04

Wojciechowicz, Edward (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S575000, C257S369000, C257S370000

Reexamination Certificate

active

07023053

ABSTRACT:
A differential transistor pair comprises a plurality of transistor cells in a substrate. Each cell comprises first drain regions at the respective edge of the cell, and a second drain region in between. Source regions are located between the respective first drain region and the second drain region. First gate regions are located between the respective first drain region and the source regions, and second gate regions are located between the source regions and the second drain region. The first drain regions of all cells are interconnected to a common first drain terminal, and the second drain region of all cells are interconnected to a common second drain terminal. The first gate regions of all cells are interconnected to a common first gate terminal, and the second gate regions of all cells are interconnected to a common second gate terminal.

REFERENCES:
patent: 4163244 (1979-07-01), Ragonese et al.
patent: 6335655 (2002-01-01), Yamamoto
patent: 6345178 (2002-02-01), Kaapala
patent: 9181191 (1997-07-01), None

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