Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2001-12-10
2003-07-01
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
Reexamination Certificate
active
06586964
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a low voltage differential signaling (LVDS) system having an internal, calibrated, differential termination.
RELATED ART
Many types of communications and consumer products require termination resistors for high-speed signals. For example, a low voltage differential signaling (LVDS) interface requires differential termination resistors to enable operation in the 1 Gb/second range. It would be desirable for these LVDS termination resistors to be maintained within the range of 90 to 120 Ohms, as specified by the various LVDS standards. However, the resistance of a fixed resistor may easily vary outside of this range with variations in process, voltage and temperature.
It would therefore be desirable to implement LVDS termination resistors on a chip, and to calibrate these LVDS termination resistors to have resistances within the specified 90-120 Ohm tolerance. It is important to note that single-ended calibrated resistor technology (wherein one end of the calibrated resistor or one end of the reference resistor is connected to a DC voltage source) generally cannot be used to calibrate a termination resistor having a differential input signal.
Having a true LVDS implementation with on-chip calibrated termination resistors would be of great value. In this case, external (off-chip) components for termination of high-speed signals will not be required, thereby reducing the cost of board implementation. In addition, the calibrated termination resistors would improve signal integrity. Moreover, a true LVDS implementation would exhibit reduced power consumption with respect to a single-ended implementation. It would further be desirable if the LVDS termination resistors remain calibrated during normal operation of the chip, taking into account variations in parameters such as process, voltage and temperature.
SUMMARY
Accordingly, the present invention provides a differential termination resistor that can be calibrated for use as a LVDS termination resistor. The LVDS termination resistor is implemented by an on-chip LVDS termination structure, which is calibrated against an external reference resistor. Calibration can be performed continuously to keep track of changes in temperature and supply voltage during normal operation of the device.
In one embodiment, a system for calibrating an adjustable termination resistor for an LVDS system is provided. The system includes an adjustable termination resistor located on a chip and a reference termination resistor located off the chip. A bias circuit coupled to the adjustable termination resistor and the reference termination resistor causes the same current to flow through the adjustable termination resistor and the reference termination resistor. The adjustable termination resistor is initially set to one end of its range of resistances. For example, the adjustable termination resistor can initially be set to its lowest resistance value. A comparator is configured to compare the voltage drop across the adjustable termination resistor with the voltage drop across the reference termination resistor. A control circuit is coupled to receive the comparator output signal. If the comparator output signal indicates that the voltage drop across the adjustable termination resistor is greater than the voltage drop across the reference termination resistor, then the control circuit stops the calibration operation. The control circuit then transmits a calibration word representative of the selected resistance of the adjustable termination resistor to control other adjustable termination resistors on the chip. However, if the output signal indicates that the voltage drop across the reference termination resistor is greater than the voltage drop across the adjustable termination resistor, then the control circuit increments the resistance of the adjustable termination resistor, and repeats the comparison operation. This process continues until the comparator determines that the voltage drop across the adjustable termination resistor is greater than the voltage drop across the reference termination resistor. At this time, the control circuit transmits a calibration word representative of the resistance of the adjustable termination resistor to control the other adjustable termination resistors on the device.
In another embodiment, calibration is performed by each of the LVDS termination structures on the chip, thereby increasing the accuracy of the resulting LVDS termination resistances. In this embodiment, the calibration of each of the LVDS termination structures is cycled, one at a time, wherein different LVDS termination structures are calibrated with the same external resistor during successive cycles.
In the present invention, power is reduced with respect to a single-ended termination because there is no current in the LVDS termination device, except for that caused by the LVDS signal. The present invention implements a true differential termination for LVDS or other similar interfaces that fall within the specifications of the different LVDS standards. To help accomplish this, the external reference resistor is selected to have a value near the mid-point of the 90 to 120 Ohm range. In a particular embodiment, the external reference resistor is selected to have a 102 Ohm range.
REFERENCES:
patent: 5955911 (1999-09-01), Drost et al.
patent: 5977796 (1999-11-01), Gabara
patent: 6064224 (2000-05-01), Esch et al.
patent: 6157206 (2000-12-01), Taylor et al.
patent: 6294932 (2001-09-01), Watarai
Kent Michael
Nix Michael A.
Chan H. C.
Tokar Michael
Xilinx , Inc.
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