Differential, reduced swing buffer design

Details Differential, reduced swing buffer design Differential, reduced swing buffer design

2000-08-29

2003-07-15

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S032000, C326S086000

Reexamination Certificate

active

06593769

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method and/or architecture for implementing buffers generally and, more particularly, to a method and/or architecture for implementing differential, reduced swing buffers.
BACKGROUND OF THE INVENTION
Referring to
FIG. 1
, a conventional reduced swing buffer
10
is shown. Reduced swing buffers are typically implemented in serial data communication and high speed data transfer applications. The buffer
10
implements current steering utilizing a scaled replica biasing scheme. The conventional reduced swing buffer
10
comprises a negative bias circuit
12
and a driver circuit
14
. The bias circuit
12
implements a resistor R
1
and a resistor R
2
. The driver circuit
14
implements a resistor R
3
, a resistor R
4
and a resistor R
5
. The resistors R
1
, R
2
, R
3
, R
4
and R
5
are external resistors. The external resistors R
1
, R
2
, R
3
, R
4
and R
5
require the circuit
10
to implement additional external components. The resistors R
1
-R
5
are required since a customer needs to configure (i.e., add) a proper resistance to the circuit
10
. The circuit
10
is resistance matched at a load end and not at the source end. The bias circuit
12
implements a minimum negative bias transistor MNBIAS
1
in a saturated region. The driver circuit
14
implements a minimum negative bias transistor MNBIAS
2
in a saturation region. The saturated transistors MNBIAS
1
and MNBIAS
2
require additional pins to receive the negative bias signal NBIAS. Additionally, the driver circuit
14
cannot implement a resistor across a true output (i.e., OUT) and a complement output (i.e., OUTb).
SUMMARY OF THE INVENTION
The present invention concerns a circuit configured to match an impedance of a first pin and a second pin coupled to a transmission line. A resistor configured to match a resistance of the transmission line across the first and second pins is implemented to provide a voltage level independent of process corner and temperature variation.
The objects, features and advantages of the present invention include providing a method and/or architecture for a differential reduced swing buffer that may (i) provide voltage levels independent of process corner and temperature variations, (ii) match an impedance of a transmission line and/or (iii) have reduced sensitivity to variation in a load resistor.


REFERENCES:
patent: 5525919 (1996-06-01), Phelan
patent: 5717345 (1998-02-01), Yokomizo et al.
patent: 6034537 (2000-03-01), Burrows et al.
patent: 6292028 (2001-09-01), Tomita

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