Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Patent
1997-12-16
2000-04-25
Arroyo, Teresa M.
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
257700, H01L 2352
Patent
active
060547588
ABSTRACT:
An integrated circuit chip package (1) is provided which incorporates one or more differential pairs (20) of signal lines coupled to an integrated circuit chip. The differential pairs each include a first signal line (21) and a second signal line (22). The first signal lines are non-coplanar with the second signal lines. The first signal lines of the differential pairs may be provided in a first plane. The second signal lines of the differential pairs may be provided in a second plane different from the first plane. A first ground plane (51) is provided adjacent the first signal lines and a second ground plane (52) is provided adjacent the second signal lines. The spacing of respective signal lines provides, among other things, the capability of having a greater density of differential pairs of signal lines within the planar area of an integrated circuit chip package.
REFERENCES:
patent: 5293069 (1994-03-01), Kato et al.
patent: 5530287 (1996-06-01), Currie et al.
patent: 5625225 (1997-04-01), Huang et al.
patent: 5847935 (1998-12-01), Thaler et al.
Arroyo Teresa M.
Telecky Jr. Frederick J.
Texas Instruments Incorporated
LandOfFree
Differential pair geometry for integrated circuit chip packages does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Differential pair geometry for integrated circuit chip packages, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Differential pair geometry for integrated circuit chip packages will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-995418