Differential line receiver

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S115000

Reexamination Certificate

active

07321239

ABSTRACT:
In a differential line receiver circuit having differential amplifier circuit where output rise and fall times are influenced by the ability of internal current sources to charge parasitic capacitances, a feedback circuit is provided to tune those current sources so as to deliver equal rise and fall time on both outputs. According to one embodiment a detector signal is derived from timing errors resulting from such rise and fall time discrepancies by means of a nested CMOS inverter arrangement coupled to an integrating element, and then used to control one or both of said current sources. It is further disclosed how deviations in the center voltage of the internal power supplies caused by the current source tuning can be allowed for by pre-processing of the signal at the input of the differential line receiver circuit by means of a differential signal transfer circuit which is able to impose a common mode signal on the input signal so as to match the center voltage of the differential amplifiers internal power supply.

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patent: 6236242 (2001-05-01), Hedberg
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International Preliminary Examination Report mailed Jun. 11, 2004 in corresponding PCT Application No. PCT/EP02/07186.
International Search Report mailed Aug. 30, 2001 in corresponding EP application No. 01115699.9-2214.

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