Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Bipolar transistor
Reexamination Certificate
2000-12-29
2002-08-06
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Function of and, or, nand, nor, or not
Bipolar transistor
C326S077000
Reexamination Certificate
active
06429691
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a circuit and more particularly to a differential-input circuit for providing differential logic signals.
2. Description of the Related Art
Due to the increasing demand for high speed data transmission and RF (radio frequency) wireless communications, the differential-input circuit such as an ECL (emitter coupled logic) is widely used for providing differential logic signals because of its application in high speed operations. To implement the digital control of the high speed circuit, an interface circuit, such as a MOS (metal oxide semiconductor) circuit, is employed because it provides high density, low cost, and low power consumption. To fulfill the high speed operation, a differential ECL generally includes bipolar transistors which require a differential reduced-swing input voltage, e.g., a differential input of voltages with a swing less than a swing from ground voltage to supply voltage. However, a MOS circuit usually provides a single-ended rail-to-rail output, e.g., a single output of voltage with a full swing from ground voltage to supply voltage, but not a differential reduced-swing signal. Hence, it is desirable to provide a MOS interface circuit which can provide a differential reduced-swing voltage signal to a differential ECL circuit for outputting a differential logic signal.
Further, as the functions of the high speed communication circuits become complicated, the size of the MOS control logic grows accordingly larger. A larger area interface circuit creates disadvantages, such as more power consumption. Hence, the demand to maintain small area for MOS logic to ECL interface is also desirable. Furthermore, the MOS control logic consumes more power not only when it has a larger area, but by its nature, this kind of circuit consumes static power. To generate an intermediate voltage level in an interface to the ECL circuit, static power consumption through the resistors and transistors is unavoidable unless an external reference voltage is supplied. For example, a cellular phone can draw power from the battery when its power is on even though it does not transmit or receive signal yet. Hence, the demand to maintain low power consumption for interfacing to an ECL circuit is also desirable.
SUMMARY OF THE INVENTION
The present invention provides a differential reduced-swing input voltage to a differential-input circuit for outputting a differential logic signal. The present invention further provides a differential-input circuit which maintains area efficiency and low power consumption.
In one aspect of the present invention, there is provided a circuit for providing a differential logic signal. The circuit includes a differential-input circuit having a first differential input and a second differential input. A first unit receives an input voltage signal and a supply voltage for providing a first voltage to the first differential input via a first node. A second unit receives the supply voltage for providing a second voltage to the second differential input via a second node, wherein the differential-input circuit outputs a signal in accordance with the first and second voltages.
In another aspect of the present invention, there is provided a circuit for providing differential logic signal. The circuit includes a differential-input circuit having a first differential input and a second differential input. A first unit receives an input voltage signal and a supply voltage for providing a first voltage to the first differential input via a first node. A second unit receives the input voltage signal and the supply voltage for providing a second voltage to the second differential input via a second node, wherein the differential-input circuit outputs a signal in accordance with the first and second voltage.
In another aspect of the present invention, the circuit may include a logic device to provide an enable signal to the circuit for providing a low power consumption operation. In another aspect of the present invention, the circuit may include the same type transistors for providing small area. These and other aspects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.
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patent: 5583456 (1996-12-01), Kimura
Cho James H
F. Chau & Associates LLP
Tokar Michael
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