Differential, high speed, ECL to CMOS converter

Electronic digital logic circuitry – Interface – Logic level shifting

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Details

326 66, 326 77, 326 84, 326126, 326127, H03K 190175, H03K 19086

Patent

active

061408425

ABSTRACT:
This invention relates to interfacing high speed, low voltage, data streams with CMOS circuits and, more specifically, to converting low voltage, differential, ECL signal levels to higher voltage levels which are compatible with CMOS circuits while maintaining high speed and sufficient drive capability for larger system applications. This is accomplished primarily by making the first stage inverters 5 and 6 as geometrically small as possible and providing additional cross-coupled buffers 7 and 8 capable of driving large capacitive loads.

REFERENCES:
patent: 5059829 (1991-10-01), Flannagan et al.

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