Differential delay buffer

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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Details

327 65, H03D 324

Patent

active

057578737

ABSTRACT:
A differential delay buffer includes a variable delay buffer unit, the variable delay buffer unit having a differential stage followed by a variable hysteresis stage. A plurality of variable delay buffer units can be cascaded together, in each variable delay buffer units a part of the required delay being effected. The variable hysteresis stage is responsive to the signal level at a second differential stage output to recover the signal at a first differential signal output from the variable delay buffer unit and is responsive to the signal level at a first differential stage output to recover the signal at the second delayed differential signal output for the variable delay buffer unit. The differential delay buffer can be included in a delay locked loop in data transmission applications.

REFERENCES:
patent: 3579150 (1971-05-01), Badessa
patent: 3916328 (1975-10-01), Wilson
patent: 4535294 (1985-08-01), Ericksen et al.
patent: 4839541 (1989-06-01), Gal et al.
patent: 5250856 (1993-10-01), Burton et al.

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