Differential current switch to super buffer logic level translat

Electronic digital logic circuitry – Interface – Logic level shifting

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Details

326 21, H03K 190175, H03K 1716

Patent

active

053810600

ABSTRACT:
The present invention is a translator circuit which receives an input compatible with a differential current switch type of circuit and transmits an output compatible with a super buffer logic type of circuit. The translator circuit has a gain stage interposed between an input and output stage which both level shift the signal downward. The gain stage provides the translator circuit with the performance necessary to avoid attenuation of the signal between receiving the input signal and transmitting the output signal. The input and output stages buffer the gain stage by shifting the voltage level of the translator downward in two stages. The translator circuit provides its own voltage reference circuits which are compatible with the power supply of the DCS and SBL circuits. The reference circuits are self compensating for temperature effects. The translator circuit of the present invention allows different types of circuit families to be inexpensively designed on the same integrated circuit chip. Therefore, DCS type circuits can be used to implement high performance operations and SBL circuits can be used to implement complex logic circuits in an efficient design. The translator circuit is used in a light receiver, including a photodetector for converting a light signal into an electrical signal. The photodetector is coupled to an amplifier/bias circuit. The amplifier/bias circuit generates a differential signal input for a differential current switch circuit. The differential current switch circuit is connected to a super-buffer logic circuit through the translator circuit.

REFERENCES:
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patent: 4849659 (1989-07-01), West
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patent: 4978871 (1990-12-01), Jordan
patent: 5153465 (1992-10-01), Sandhu
Nakamura, "A 390ps 1000-Gate Array Using GaAs Super-Buffer FET Logic", Feb. 14, 1985, Proc. IEEE ISSCC, pp. 204-205.
Ewen, "GB/S Fiber Optic Link Adapter Chip Set", IEEE GaAs IC Symposium, Nov. 6, 1988, pp. 11-14.

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