Differential current switch logic gate

Details Differential current switch logic gate Differential current switch logic gate

1997-09-26

2000-01-11

Tokar, Michael

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

326104, 326112, 326115, 326119, 326121, H03K 19094, H03K 1920

Patent

active

060140410

ABSTRACT:
A differential current switch logic (DCSL) system is provided which has an evaluation tree including a plurality of input terminals and a pair of complementary output nodes. The DCSL system also has an output network which establishes a pair of state outputs at a predetermined level during a precharge phase and establishes the state outputs at complementary levels in response to the evaluation tree output nodes during an evaluate phase. First and second NMOS transistors are connected in series between the DCVS output state network and the evaluation tree output nodes with their gates coupled to the state outputs to isolate the outputs from the evaluation tree following evaluation.

REFERENCES:
patent: 4570084 (1986-02-01), Griffin et al.
patent: 4710650 (1987-12-01), Shoji
patent: 5216295 (1993-06-01), Hoang
patent: 5550491 (1996-08-01), Furuta
patent: 5841298 (1998-11-01), Huang
Dinesh Somasekhar, Kaushik Roy, Differential Current Switch Logic: A Low Power DCVS Logic Family; IEEE Journal of Solid-State Circuits, vol. 31, No. 7, 981-991 (Jul. 1996).
Chung-Yu Wu, Kuo-Hsing Cheng, Latched CMOS Differential Logic (LCDL) for Complex High-Speed VLSI, IEEE Journal of Solid-State Circuits, vol. 26, No. 9, 1324-1328 (Sep. 1991).
Shih-Lien Lu, Implementation of Iterative Networks with CMOS Differential Logic, IEEE Journal of Solid-State Circuits, vol. 23, No. 4, 1013-1017 (Aug. 1988).
Lawrence G. Heller, William R. Griffin; Cascode Voltage Switch Logic: A Differential CMOS Logic Family; ISSCC84, 16-17 (Feb. 22, 1984).

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