Differential CMOS logic with dynamic bias

Details Differential CMOS logic with dynamic bias Differential CMOS logic with dynamic bias

2005-04-19

2005-04-19

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S103000, C327S333000

Reexamination Certificate

active

06882179

ABSTRACT:
A CMOS circuit arrangement. In this arrangement, relatively thick oxide devices are fabricated along with relatively thin oxide devices on the same chip. High speed logic circuits are fabricated with thin oxide devices as differential logic operating with a low voltage swing. A current source is fabricated using thick oxide devices to drop a large percentage of the supply voltage, protecting the thin oxide devices from damage caused by large voltage swings. An adaptive bias control circuit receives inputs from the logic circuit or elsewhere to control the bias current available from the current source to permit larger currents to pass through the current source at switching times.

REFERENCES:
patent: 5149992 (1992-09-01), Allstot et al.
patent: 5432114 (1995-07-01), O
patent: 5451898 (1995-09-01), Johnson
patent: 6218858 (2001-04-01), Menon et al.
patent: 6225830 (2001-05-01), Ra
patent: 6486821 (2002-11-01), Aude et al.
patent: 0387999 (1990-09-01), None
patent: 0898370 (1999-02-01), None
patent: 070074556 (1995-03-01), None

Affiliated with

Also associated with

Rating

Differential CMOS logic with dynamic bias does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Differential CMOS logic with dynamic bias, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Differential CMOS logic with dynamic bias will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3439648