Differential cascode current mode driver

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

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Details

C326S127000, C326S030000, C327S051000, C327S052000, C327S053000

Reexamination Certificate

active

06522174

ABSTRACT:

FIELD
The present invention relates generally to current mode drivers, and more specifically to scalable, low power, current mode drivers.
BACKGROUND
Integrated circuits typically have dedicated interface circuits to communicate with other integrated circuits and other systems. Some dedicated interface circuits employ current mode drivers that drive currents between integrated circuits. Typical current mode drivers include input transistors that do not completely turn off. Known methods for biasing these drivers includes the use of wide-swing bias circuits. Examples of wide-swing bias circuits are discussed in chapter six of: David A Johns & Ken Martin, “Analog Integrated Circuit Design,” (1997).
Signals that travel from one integrated circuit to another are becoming faster and faster. As signal speeds increase, the effect of imperfect “channels” also increases. A “channel,” for the purposes of this description, is any medium that the signal passes through. For example, a channel may consist of printed circuit board traces or wires routed between integrated circuits. One possible effect of an imperfect channel is frequency dependent attenuation of signal amplitudes. In general, when the signal amplitude is attenuated as a function of frequency, the signal becomes smaller as the speed increases. When the signal gets too small, communications between integrated circuits can become unreliable.
One known method for compensating for frequency dependent attenuation is the use of pre-equalization at the driver. Pre-equalization adjusts the amplitude of the driver depending on the frequency of outbound data. Successful pre-equalization compensates for signal loss in the channel, and results in a substantially constant amplitude received voltage wave for low and high frequency data. One mechanism for pre-equalization is described in: Ramin Faijad-Rad, Chih-Kong Ken Yang, Mark A. Horowitz, and Thomas H. Lee, “A 0.4-um CMOS 10-Gb/s 4-PAM Pre-Emphasis Serial Link Transmitter,” Vol. 34, No. 5, IEEE Journal of Solid-State Circuits, (May 1999).
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternate integrated circuit interfaces.


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Farjad-Rad, R., et al., “A 0.4-um CMOS 10-Gb/s 4-PAM Pre-Emphasis Serial Link Transmitter”,IEEE Journal of Solid-State Circuits, 34(5), pp. 580-585, (May 1999).

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