Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
Reexamination Certificate
2007-02-13
2007-02-13
Fleming, Fritz (Department: 2181)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Scoreboarding, reservation station, or aliasing
C712S218000, C712S225000
Reexamination Certificate
active
09826134
ABSTRACT:
A digital signal processor may include a plurality of processing elements that are coupled together to accomplish a specialized function. Each processing element may utilize the same shared storage in a form of a plurality of general purpose registers. Each of these registers may be accessed by any of the processing elements. Each register may include a data storage section and a plurality of storage areas for data valid bits that indicate whether the data is valid or not for each of the plurality of processing elements.
REFERENCES:
patent: 5050070 (1991-09-01), Chastain et al.
patent: 5293500 (1994-03-01), Ishida et al.
Hennessy, et al., Computer Architecture a Quantitative Approach, Morgan Kaufman Publishers Inc., Second Edition, pp. 246-251.
Fleming Fritz
Meonske Tonia L.
Trop Pruner & Hu P.C.
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