Different embedded strain layers in PMOS and NMOS...

Details Different embedded strain layers in PMOS and NMOS... Different embedded strain layers in PMOS and NMOS...

2006-11-21

2009-08-25

Ghyka, Alexander G (Department: 2812)

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

C438S269000, C438S413000, C257SE21601, C257SE21403, C257SE21632

Reexamination Certificate

active

07579262

ABSTRACT:
By omitting a growth mask or by omitting lithographical patterning processes for forming growth masks, a significant reduction in process complexity may be obtained for the formation of different strained semiconductor materials in different transistor types. Moreover, the formation of individually positioned semiconductor materials in different transistors may be accomplished on the basis of a differential disposable spacer approach, thereby combining high efficiency with low process complexity even for highly advanced SOI transistor devices.

REFERENCES:
patent: 5864161 (1999-01-01), Mitani et al.
patent: 6165826 (2000-12-01), Chau et al.
patent: 6891192 (2005-05-01), Chen et al.
patent: 7067368 (2006-06-01), Fang et al.
patent: 7112481 (2006-09-01), Fang et al.
patent: 7178110 (2007-02-01), Fujino
patent: 7326601 (2008-02-01), Wirbeleit et al.
patent: 7348232 (2008-03-01), Chidambaram et al.
patent: 103 51 008 (2005-06-01), None
patent: 2004031753 (2004-01-01), None

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