Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2005-08-03
2008-08-05
Sough, H. S. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S162000
Reexamination Certificate
active
07409507
ABSTRACT:
Disclosed is to reduce an amount of memory required for a difference bit map corresponding to a storage extent of large capacity. A difference bit map27is made into multi-tiers. A difference is expressed by a bit321of an entry320of a second tier. An entry310of a first tier is provided with a pointer311to the entry of the second tier and a representative bit313, and the entry320of the second tier is made unnecessary when all values of the corresponding bits321are equal to a value of the representative bit313.
REFERENCES:
patent: 6618794 (2003-09-01), Sicola et al.
patent: 2005/0204105 (2005-09-01), Kawamura et al.
Eland Shawn
Hitachi , Ltd.
Sough H. S.
Townsend and Townsend / and Crew LLP
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