Dielectrically isolated semiconductor devices having improved ch

Details Dielectrically isolated semiconductor devices having improved ch Dielectrically isolated semiconductor devices having improved ch

1993-12-08

1996-09-17

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257334, 257370, 257374, 257376, 257519, H01L 2900

Patent

active

055571255

ABSTRACT:
Dielectrically isolated semiconductor devices such as DMOS and ZGBT devices comprise a substrate having upper and lower surfaces. Source, drain and channel regions are disposed along the upper surface. The drain region extends downwardly to the lower surface of the substrate and laterally beneath the source and channel region. The drain merges with an underlying region of high conductivity. The underlying region is generally flat except for an upwardly extending portion thereof laterally disposed from the source region and providing a lower resistance path for current through the drain region. The DMOS devices can be included within an integrated circuit chip containing other types of semiconductor devices.

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Pat. Abs. of Japan, vol. 5, No. 78 (E-58) [750], May, 1981.
Pat. Abs. of Japan, vol. 10, No. 108 (E-397) [2165], Apr. 1986.

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