Diagonal matrix delay

Details Diagonal matrix delay Diagonal matrix delay

2008-07-29

2008-07-29

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S189050

Reexamination Certificate

active

07405983

ABSTRACT:
A method of delaying an input signal comprises serially receiving the input signal at a plurality of rows of delay elements; applying a row selection signal to a row of delay elements to select the row from the plurality of rows; supplying a column selection signal to a tap buffer associated with a delay element in the selected row to select an output of the delay element; coupling outputs of tap buffers associated with delay elements in each row to form an output of each row; coupling outputs of each of the plurality of rows to provide an incrementally-delayed input signal from the selected row; outputting the incrementally-delayed input signal from the selected delay element in the selected row; and changing row selection from the selected row to a contiguous row of the plurality of rows in the absence of a change in the selection of the corresponding tap buffers.

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