Diagnostic arrangement for digital computer system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique

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714712, 714 53, 714 25, G01R 3128

Patent

active

059084715

ABSTRACT:
A diagnostic subsystem is used in a digital device in a digital computer system includes a diagnostic register, a device output control circuit and a diagnostic register reset circuit. The diagnostic register includes a plurality of stages each of which is associated with one of the types of transfers over the bus. Each stage is selectively conditionable by the digital computer system's processor. The device output control circuit controls transfers by the digital device over the bus. The device output control circuit enables the digital device, when it is to engage in a transfer, to transfer information correctly when the associated stage is set and to transfer information incorrectly when the stage has the set condition. For transfers in which the one device is to transmit information over the bus, the incorrectly transmitted information causes error checking circuitry in other devices in the system to generate error indications, which are provided to the processor. On the other hand, for transfers in which the device is to receive information over the bus, correctly received information causes error checking circuitry in the device to generate an error indication, which is also provided to the processor. The diagnostic register reset circuit enables said the respective stages to be conditioned to said reset condition following a transfer of incorrect information during a transfer of said associated transfer type, so that the one device engages in such a transfer once after being enabled by the processor.

REFERENCES:
patent: 4785453 (1988-11-01), Chandran et al.
patent: 5155735 (1992-10-01), Nash et al.
patent: 5537425 (1996-07-01), Tsou
patent: 5649090 (1997-07-01), Edwards et al.
patent: 5689634 (1997-11-01), McBride

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