Devices and methods for channel-encoding and channel-decoding of

Coded data generation or conversion – Digital code to digital code converters – To or from run length limited codes

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341 58, H03M 700

Patent

active

057481199

ABSTRACT:
Channel-encoding and channel-decoding of a (d, k, m, n) code are disclosed. An m-bit input word is encoded to an (n-d+1)-bit channel word by an encoding table. One or more merge bits are added to each of the encoded channel words so as to form an n-bit channel word. Depending upon detection of violation of d and/or k constraints in the juxtaposition of consecutive channel words in combination with their intervening merge bit(s), certain bits are converted to cause the d and k constraints to both be met, and for the purpose of minimizing the digital sum value (DSV). To decode the channel words thus encoded, n-bit channel words are received and examined as consecutive pairs to determine the states of the merge bit(s) and the identifying bits of each channel word. The identifying bits and/or the last bit of the first channel code and the first bit of the second channel code are converted based on the validity of the d and k constraints. The merge bit(s) are then discarded and the remaining bits of the channel word are decoded into m-bit data using a decoding table.

REFERENCES:
patent: 5375249 (1994-12-01), Cho
patent: 5506581 (1996-04-01), Ino et al.

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