Device to check the end of a test

Details Device to check the end of a test Device to check the end of a test

1997-07-21

2000-04-25

Nelms, David

Static information storage and retrieval

Read/write circuit

Testing

365195, G11C 700, G11C 2900

Patent

active

060551984

ABSTRACT:
An integrated circuit comprises a memory zone, a test mode and at least one binary type of lock, said lock when it is in a first state permitting the operation of the integrated circuit in the test mode and when it is in a second state prohibiting the operation of the integrated circuit in test mode, wherein the integrated circuit comprises a dysfunction circuit that works when the lock is in the first state, said dysfunction circuit preventing the memory from working normally. The use of a dysfunction circuit makes it possible to reveal components whose test locks have not been activated as being defective.

REFERENCES:
patent: 4049956 (1977-09-01), Van Veen
patent: 4841233 (1989-06-01), Yoshida
patent: 4970727 (1990-11-01), Miyawaki et al.
patent: 5305267 (1994-04-01), Haraguchi et al.
patent: 5408435 (1995-04-01), McClure et al.
patent: 5428575 (1995-06-01), Fudeyasu
patent: 5594694 (1997-01-01), Roohparvar et al.
patent: 5642318 (1997-06-01), Knaack et al.
French Search Report from French Patent Application 96 09487, filed Jul. 22, 1996.
Patent Abstracts of Japan, vol. 13, No. 245, Jun. 8, 1989 & JP-A-01 047972 (NEC Corp.).

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