Device structures for reducing device mismatch due to...

Details Device structures for reducing device mismatch due to... Device structures for reducing device mismatch due to...

2007-08-21

2007-08-21

Le, Dung A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S049000, C438S014000, C438S018000

Reexamination Certificate

active

11189940

ABSTRACT:
A circuit and method are disclosed for reducing device mismatch due to trench isolation related stress. One or more extended active regions are formed on the substrate, wherein the active regions being extended from one or more ends thereof, and one or more operational devices are placed on one or more active regions, wherein the extended active region has at least a length twice as much as a distance between gates of two neighboring operational devices.

REFERENCES:
patent: 2004/0238900 (2004-12-01), Yamada et al.

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