Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-01-02
2007-01-02
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257S759000
Reexamination Certificate
active
10861149
ABSTRACT:
A substrate is provided having semiconductor device structures formed in and on the substrate. The semiconductor device structures comprise conductor layers embedded in openings in dielectric layers having a dielectric constant of less than 4.5. The dielectric layer has a roughness between the dielectric and the conductor wherein the roughness of the dielectric layer divided by the thickness of a barrier layer underlying the conductor layer is 0 to 1. The integrated circuit structure is prepared for failure analysis by removing the low dielectric constant dielectric layers and exposing the conductor layers for further failure analysis by optical examination or scanning electron microscope (SEM).
REFERENCES:
patent: 5504042 (1996-04-01), Cho et al.
patent: 6528409 (2003-03-01), Lopatin et al.
patent: 6797605 (2004-09-01), Goh et al.
patent: 2002/0004300 (2002-01-01), Plat et al.
Cheng Yi-Lung
Lin Hway Chi
Wang Chao-Hsiung
Taiwan Semiconductor Manufacturing Co. Ltd.
Thomas Kayden Horstemeyer & Risley
Vu David
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