device signature generator

Details device signature generator device signature generator

1999-06-22

2001-05-01

Nelms, David (Department: 2818)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Decoding

C326S109000

Reexamination Certificate

active

06225829

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to integrated circuits, and more particularly to circuits that provide configuration and identification information for semiconductor devices.
BACKGROUND OF THE INVENTION
While electronic systems continue to proliferate in all aspects of society, the various components that make up such systems are subject to some variation. This variation arises out of products that provide the same general function, but according to different standards. For example, while electrically programmable read only memories (EEPROMs) have the general function of storing data in a nonvolatile fashion, EEPROMs may have different storage capacities and/or be accessed in differing fashions. The input/output (I/O) bit widths may vary, with some EEPROMs providing data in eight-bit bytes, and others providing data in sixteen-bit words. In addition, according to different standards, portions of the memory may require special procedures to program and/or erase the memory cells within. To add to the many types of EEPROM configurations, power supply voltages may also vary. While some EEPROM may be designed to operate at three volts, others may require a five volt power supply.
In order to accommodate various standards and configurations, it is desirable to provide semiconductor devices that can be altered to operate according to one of a number of different standards. For example, while an EEPROM may have a certain capacity, the device could be altered during manufacturing to provide an eight bit or sixteen bit output. Furthermore, other variations could be implemented from one basic starting design. While external markings on the package of a device may provide the information necessary to identify the configuration, it is also desirable to provide device information in electronic form. Such device information is typically provided by applying a particular set of control signals to a semiconductor device, and reading the resulting output bits at certain pins. Such information is often referred to as a device “signature.”
Semiconductor devices typically provide unique signature information, such as a device identification (ID) code and/or a manufacturer identification code. The device ID code can be used to indicate the various features of the semiconductor device. In the case of an EEPROM, the device signature can be read by the system, and the system can thereby know critical information about the EEPROM's operation.
A drawback to providing one particular device signature for a semiconductor device is that it may be desirable to utilize a basic design, and then customize that design to provide a number of devices having different functions. In such a case, each different device would have to be designed to provide a different device signature.
Another drawback to singular device signatures, is that some systems, although capable of functioning with a variety of devices, may be designed to expect a particular device signature. Thus, although a semiconductor device could operate within the system, due to its incompatible device signature, this is not possible.
For semiconductor devices in rapidly evolving markets, a singular device signature is also a drawback. As new variations to existing devices are developed, new device signatures may be required.
It would be desirable to provide some way of introducing greater flexibility into manner in which a device signature is provided by a semiconductor device.
SUMMARY OF THE INVENTION
According to the preferred embodiment, a device signature circuit is capable of providing any of a number of device signatures based upon device information signals. Furthermore, the device signatures are customizable by way of a number of conductive options. In the preferred embodiment, the conductive options are established by a metallization option.
According to one aspect of the preferred embodiment, the device signature circuit includes a combinatorial logic section that receives the information signals and activates a selected configuration signal in response thereto. The configuration signals are received by a signature option section that provides a unique device signature for each configuration signal. The unique device signatures are established by enabling, or alternately, disabling conductive options.
According to another aspect of the preferred embodiment, the signature option section includes a select bank corresponding to each bit of the device signature. Each select bank receives the configuration signals, and includes a conductive option and a select device associated with each configuration signal. The select banks further include a select node that establishes the logic of the signature bit. The select node is placed at a first logic state by a charge device. In the event a configuration signal is active, and its associated conductive option is enabled, the charge node will transition to a second logic state.
According to another aspect of the preferred embodiment, the conductive options are established by the last metallization layer in the semiconductor device manufacturing process.
An advantage of the preferred embodiment is that it provides a way of generating a number of device signatures according to device information.
Another advantage of the preferred embodiment is that when the conductive options are established by a last metallization layer, the device signatures can be customized with relative ease.


REFERENCES:
patent: 5218241 (1993-06-01), Kurozumi

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