Device resource allocation

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C710S120000

Reexamination Certificate

active

07058780

ABSTRACT:
In one embodiment, a method is provided. The method of this embodiment may include detecting an operation initiated by a first device that can result in a change of a first set of resources previously allocated to a second device. If the operation has completed at least a certain phase of the operation and the first set of resources has changed as a result of the operation, the method of this embodiment may also comprise changing, by the second device, a second set of resources previously allocated by the second device to a third device. Of course, many modifications, variations, and alternatives are possible without departing from this embodiment.

REFERENCES:
patent: 5832238 (1998-11-01), Helms
patent: 6260094 (2001-07-01), Davis et al.
patent: 6629157 (2003-09-01), Falardeau et al.
patent: 2003/0009432 (2003-01-01), Sugahara et al.
patent: 2003/0093604 (2003-05-01), Lee
patent: 2003/0188062 (2003-10-01), Luse et al.
Adaptec -Adaptec SCSI RAID 2000S Support.
Adaptec -Adaptec SCSI RAID 2005S Support.
Adaptec -Motherboard Partners and Compatibility.
Adaptec -Adaptec SCSI RAID 2005S Technical SPecs.
Adaptec -Adaptec Article: Zero Channel RAID Frequently Asked Questions.
Intel Corp., Product Brief, Intel Server Board SCB2.
Serial ATA: High Speed Serialized AT Attachment Revison 1.0, Aug. 29, 2001.
Super0, Super P3TDDR, User's Manual, Revision 1.0a.
PCI Local Bus, PCI BIOS Specification, Revision 2.1 Aug. 26, 1994.
PCI Local Bus, PCT-to-PCI Bridge Architecture Specification, Revison 1.1, Dec. 16, 1998.
PCI Local Bus, PCI Local Bus Specification, Revision 2.2, Dec. 18, 1998.
PCI Local Bus, Mini PCI Specification, Revision 1.0, Oct. 25, 1999.
PCI Local Bus, PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a, Jul. 24, 2000.
PCI Local Bus, PCI Local Bus Specification, Revision 2.3, Mar. 29, 2002.
PCI Local Bus, Appendix D, Class Codes.
PCI Local Bus, Appendix H, Capability IDs, 0003.13.
R. Russell, BIOS Basics Online!, Jun. 5, 2001, one page.
A. Tischenkó, “Zero-Channel RAID. The Economic Approach”, Computer Review Online!, four pages.
Intel Corporation, “DK440LX Motherboard -Technical Product Specification”, Oct. 1997, pp. 1-90.
Intel Corporation, “MROMB Design Considerations Using the Intel 80303 I/O Processor -Application Note” Sep. 2001, 15 pages.
Copy of PCT Search Report dated Apr. 19, 2004.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Device resource allocation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Device resource allocation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device resource allocation will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3632846

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.