Device, method, and storage for verification scenario...

Details Device, method, and storage for verification scenario... Device, method, and storage for verification scenario...

2008-01-18

2010-10-26

Doan, Nghia M (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C714S724000, C714S735000, C714S738000, C714S741000, C714S742000, C324S763010, C324S764010, C324S765010

Reexamination Certificate

active

07823101

ABSTRACT:
A verification scenario generation device including a first input unit which accepts input of a device list showing devices connected with a circuit to be verified, parameter setting information for the devices, and a test bench combination list corresponding to the devices, a test bench library which holds the test bench, and a test bench generation unit to generate a test bench for verification, a scenario template generation unit which generates a scenario template. The device further includes a data combination list generation unit which generates a combination list of data kinds, a verification item generation unit which generates verification items based on a combination list of the data kind and a combination list of the test bench input, and a verification scenario generation unit which generates a verification scenario based on the scenario template, and the verification items.

REFERENCES:
patent: 6490711 (2002-12-01), Buckley, Jr.
patent: 6654715 (2003-11-01), Iwashita
patent: 7260798 (2007-08-01), Gupta et al.
patent: 7454324 (2008-11-01), Seawright et al.
patent: 2000-181939 (2000-06-01), None
patent: 2003-30270 (2003-01-01), None
patent: 2005-196681 (2005-07-01), None

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