Device-level address translation within a programmable...

Details Device-level address translation within a programmable... Device-level address translation within a programmable...

2007-05-22

2007-05-22

Souch, Hyung (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S102000, C711S147000, C710S305000, C714S023000, C365S230030

Reexamination Certificate

active

11090594

ABSTRACT:
A programmable non-volatile memory device includes block switching logic that enables device-level translation rules to be changed. The device-level translation rules map the external addresses received by the flash memory device to the internal addresses of the programmable non-volatile memory device. Because the device-level translation rules are changeable, the physical location in the programmable non-volatile memory device to which an external address maps can be changed in a manner that is transparent to off-device operations. By allowing device-level translation rules to be changed, block management functions can be accomplished within the programmable non-volatile memory device itself.

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“smxFFS Flash File System,” Micro Digital, Nov. 18, 2002.

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