Device isolation technology

Details Device isolation technology Device isolation technology

1996-12-02

1999-07-20

Fourson, George

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Recessed oxide by localized oxidation

438448, 438907, 438913, 438763, H01L 2176

Patent

active

059267240

ABSTRACT:
Disclosed is a device isolation technology for defining active region of a semiconductor device. An oxide is formed on a semiconductor substrate in a first reaction chamber where a first gas containing silicon and a purge gas exist therein. Afterwards, the first temperature of the first reaction chamber is changed to second temperature by injection of a purge gas. A buffer film is formed on the oxide film in the first reaction chamber at the second temperature by injection of a silicon gas. Thereafter, a silicon nitride layer is formed on the buffer film in a second reaction chamber by injecting a second gas containing silicon. Lastly, field oxides are formed by a LOCOS technique through pattering of the three layers and thermal oxidation of exposed portions.

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patent: 4897364 (1990-01-01), Nguyen et al.
patent: 4901133 (1990-02-01), Curran et al.
patent: 4951601 (1990-08-01), Maydan et al.
patent: 5589233 (1996-12-01), Law et al.
patent: 5643825 (1997-07-01), Gardner et al.

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